Flash memory devices store information with high density on Flash cells with ever smaller dimensions. In addition, Multi-Level Cells (MLC) store several bits per cell by setting the amount of charge in a cell. Flash memory devices are organized into (physical) pages. Each page includes a section allocated for data (512 bytes-8 Kbytes and expected larger in the future) and a small amount of spare bytes (64-512 or more bytes for every page) for storing redundancy and metadata. The redundancy bytes are used to store error correcting information, for correcting errors which may have occurred during flash lifetime and the page Read process. Each Program operation is performed on an entire page. A number of pages are grouped together to form an Erase Block (erase block). A page cannot be erased unless the entire erase block which contains it is erased.
One common application of flash memory devices is Secure Digital (SD) cards. An SD card may typically contain flash memory devices and a flash memory controller. The controller translates commands arriving through the SD interface into actions (Read/Write/Erase) on the flash memory devices. The most common SD commands may be Read and Write commands of one or more sectors, where a sector may be, but is not limited to, a sequence of 512 bytes. The Read or Write commands may be directed to a single sector or multiple sectors. These commands may refer to logical addresses. These addresses may then be redirected to new addresses on the flash memory which need not directly correspond to the logical addresses that might be referenced by the Read or Write commands. This is due to memory management that may be carried out by the flash memory controller in order to support several features such as wear-leveling, bad block management, firmware code and data, error-correction, and others. The erase function is performed on an entire erase block. Because of this functionality, before the data of a certain block may be replaced such as during a write function, the new data must be written in an alternative location before an erase can occur, to preserve the integrity of the stored data.
Due to the small dimensions of a typical SD card and the price limitations, the controller may typically have only a small RAM available for storage. The small size of the RAM memory limits the type of memory management which may be carried out by the controller with regard to the data stored in the flash memory device and received from the interface.
The controller may typically manage the memory at the erase block level, because managing data of small particle sizes becomes difficult. That is, the logical memory space may be divided into units of memory contained within a single erase block or some constant. multiple of erase blocks, such that all logical sector addresses within each said unit of memory may be mapped to the same erase block or some constant multiple thereof.
This type of management has the drawback that for writing random access data sectors to memory or other memory units smaller than an erase block, erase blocks must be frequently rewritten. Because of the characteristics of flash memory, each new piece of information is written into an empty page. In flash memory a page may not be rewritten before the entire erase block is erased first.
If a portion of the memory unit contained within an erase block may need to be rewritten, it is first written into a freshly allocated erased erase block. The remaining, unmodified, contents of the erase block may then be copied into the new erase block and the former erase-block may be declared as free and may be further erased. This operation may be referred to as “sealing” or “merging”. The operation involves collecting the most recent data of a logical block and then merging it with the rest of the block data in a single erase block. Thus, even if a single sector from an erase block is rewritten, a complete erase block would be rewritten.
This may result in causing a significant degradation in the average write speed. It may also impose a significant delay in the response time between random write sector operations. It also may cause excessive P/E (program/erase) cycling, which may be problematic in new generations of flash memory devices where the number of P/E cycles is limited to a few thousand.
The controller is used to manage the overhead described above, and must always keep track of the data associated with each logical address and the actual memory location. This is usually achieved by implementing a mapping method between the logical address space assigned to the data and the actual memory storage location of the data.
Several methods may be implemented to execute such a mapping. Two approaches implement mapping systems that rely on block mapping and page mapping, respectively. In an approach using block mapping, each physical block in the flash memory is mapped to a contiguous logical memory block of the same data size (LBA). In this approach when one page in some logical block is updated, the entire associated physical block must be copied to a fresh block, and the new data must be written in place of the obsolete copy. A merge may be an operation where the original content of a logical block is merged with the new data to form a new up to date copy of the block. This up to date copy is the data block that is associated with a logical data block assigned to the data contained within. In the second approach, each logical page of a logical block is mapped to an arbitrary physical page where two pages belonging to the same logical block can reside in different physical blocks of the flash memory. The second approach requires additional complexity in terms of the amount of management data and memory overhead required for the physical memory to logical address mapping tables. For memory applications where severe limitations exist on available control memory, this approach is less appropriate. Flash memories such as SD have limited amount of memory overhead and the first mapping approach, or variants thereof are more practical.